The present invention relates to computer storage, particularly, to a method, device and storage system for building and allowing cache access.
Cache memory is memory disposed between the central processing unit (CPU) of a computing system and the main memory of the computing system. Due to the location and speed of cache memory in a computing system architecture, cache memory is often used to hold the most frequently accessed data and program codes during the execution of a program. Threads within the computing system may directly interact with the cache, thereby avoiding the need to access information from the relatively slower main memory or hard disk.
In some systems, multiple threads from a processor may request access to cache memory in order to update the cached data. This is especially true with multi-core processors. However, if two separate threads are permitted to simultaneously update the same data in the cache memory, the integrity of the data may be crippled. On the other hand, delays in cache access may slow down the performance of the computing system.